1. Field of the Invention
The present invention relates to a microcomputer, more particularly to a microcomputer having a watchdog timer.
2. Description of the Related Art
The term ‘microcomputer’ as used herein refers to a large-scale integrated circuit including a central processing unit (CPU) and other circuitry. Microcomputers of this type are used in many control applications, and are often referred to as microcontrollers. A watchdog timer (WDT) is a circuit that detects so-called runaway conditions in which the CPU's control program is not executed correctly, and resets the microcomputer when a runaway is detected.
While the CPU's control program is executing correctly, the CPU executes an instruction to clear a WDT counter at intervals such that the WDT counter never overflows. If a runaway occurs, the instruction to clear the WDT counter will not be executed as necessary and the WDT counter will eventually overflow, generating a signal that resets the microcomputer to recover from the runaway condition.
The signal from the WDT generally resets only the internal operation of the microcomputer. Therefore, in a system comprising a microcomputer and external peripheral devices, when the microcomputer malfunctions, first the microcomputer is internally reset by the signal generated by the WDT overflow, and then, after the microcomputer has recommenced normal operation, the external peripheral devices are reset by signals sent by the control program from output ports of the microcomputer.
The external peripheral devices are thus reset after the microcomputer is released from the reset state, but this scheme requires both hardware and software. The hardware includes the output ports from which the reset signals are sent to the external peripheral devices, and a timer to measure the time interval for which the reset signals are asserted. The software includes instructions to supervise the timer, instructions to control the output ports, and various other instructions. Accordingly, while the external peripheral devices are being reset, managing the resetting process places no small load on the microcomputer.
Another scheme is described in, for example, Japanese Patent No. H07-19187 (in the lower right column on page 3 and FIG. 1). In this scheme, the reset signal output from the runaway detection circuit (watchdog timer) is sent both to internal circuits in the microcomputer and also to the outside through a reset output terminal, so that, for example, another microcomputer can be informed the occurrence of a runaway.
Since the internal reset signal in the microcomputer described in the above patent document is also output to the outside, it can be used to reset external peripheral devices directly. When this is done, however, the pulse width of the reset signal has sometimes proved inadequate to reset the external peripheral devices reliably.